On Thu, Sep 07, 2023 at 05:35:26PM +0100, Robin Murphy wrote: > On 2023-09-06 08:21, Sascha Hauer wrote: > > On Tue, Sep 05, 2023 at 10:03:20AM +0100, Robin Murphy wrote: > > > On 2023-09-04 12:58, Sascha Hauer wrote: > > > > Add rockchip,io-domains property to the Rockchip pinctrl driver. This > > > > list of phandles points to the IO domain device(s) the pins of the > > > > pinctrl driver are supplied from. > > > > > > > > Also a rockchip,io-domain-boot-on property is added to pin groups > > > > which can be used for pin groups which themselves are needed to access > > > > the regulators an IO domain is driven from. > > > > > > > > Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> > > > > --- > > > > .../bindings/pinctrl/rockchip,pinctrl.yaml | 13 ++++++++++++- > > > > 1 file changed, 12 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml > > > > index 10c335efe619e..92075419d29cf 100644 > > > > --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml > > > > +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml > > > > @@ -62,6 +62,11 @@ properties: > > > > Required for at least rk3188 and rk3288. On the rk3368 this should > > > > point to the PMUGRF syscon. > > > > + rockchip,io-domains: > > > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > > > + description: > > > > + Phandles to io domains > > > > + > > > > "#address-cells": > > > > enum: [1, 2] > > > > @@ -137,7 +142,13 @@ additionalProperties: > > > > - description: > > > > The phandle of a node contains the generic pinconfig options > > > > to use as described in pinctrl-bindings.txt. > > > > - > > > > + rockchip,io-domain-boot-on: > > > > > > I don't think "on" is a particularly descriptive or useful property name for > > > something that has no "off" state. > > > > In fact it has an "off" state. A IO Domain can be disabled in the SoC > > registers > > Oh, is that a thing on newer SoCs? At least in the RK3399 TRM the only > I/O-domain-related control I can find is the 1.8V/3.0V logic level threshold > in GRF_IO_VSEL (plus the one outlier in PMUGRF_SOC_CON0). I didn't realize that it's new, the RK3568 is the first Rockchip SoC I work on, but yes, on RK3568 we have three bits per domain. One bit is to enable 1.8V, one to enable 2.5V and one for 3.3V. I would assume that clearing all bits means disable, and whatever strange things may happen when multiple bits are set... Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
