On Tue, Sep 05, 2023 at 04:24:51PM +0200, Lorenzo Pieralisi wrote:
> On Tue, Sep 05, 2023 at 12:34:58PM +0100, Marc Zyngier wrote:
> >
> > I came up with the following alternative approach, which is as usual
> > completely untested. It is entirely based on the quirk infrastructure,
> > and doesn't touch the ACPI path at all.
> >
> > Thanks,
> >
> > M.
> >
> > diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h
> > index 3db4592cda1c..00641e88aa38 100644
> > --- a/drivers/irqchip/irq-gic-common.h
> > +++ b/drivers/irqchip/irq-gic-common.h
> > @@ -29,4 +29,8 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
> > void gic_enable_of_quirks(const struct device_node *np,
> > const struct gic_quirk *quirks, void *data);
> >
> > +#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
> > +#define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1)
> > +#define RDIST_FLAGS_FORCE_NON_SHAREABLE (1 << 2)
> > +
> > #endif /* _IRQ_GIC_COMMON_H */
> > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> > index e0c2b10d154d..6edf59af757b 100644
> > --- a/drivers/irqchip/irq-gic-v3-its.c
> > +++ b/drivers/irqchip/irq-gic-v3-its.c
> > @@ -44,10 +44,6 @@
> > #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2)
> > #define ITS_FLAGS_FORCE_NON_SHAREABLE (1ULL << 3)
> >
> > -#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
> > -#define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1)
> > -#define RDIST_FLAGS_FORCE_NON_SHAREABLE (1 << 2)
> > -
> > #define RD_LOCAL_LPI_ENABLED BIT(0)
> > #define RD_LOCAL_PENDTABLE_PREALLOCATED BIT(1)
> > #define RD_LOCAL_MEMRESERVE_DONE BIT(2)
> > @@ -4754,6 +4750,14 @@ static bool __maybe_unused its_enable_rk3588001(void *data)
> > return true;
> > }
> >
> > +static bool its_set_non_coherent(void *data)
> > +{
> > + struct its_node *its = data;
> > +
> > + its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE;
> > + return true;
> > +}
> > +
> > static const struct gic_quirk its_quirks[] = {
> > #ifdef CONFIG_CAVIUM_ERRATUM_22375
> > {
> > @@ -4808,6 +4812,11 @@ static const struct gic_quirk its_quirks[] = {
> > .init = its_enable_rk3588001,
> > },
> > #endif
> > + {
> > + .desc = "ITS: non-coherent attribute",
> > + .property = "dma-noncoherent",
> > + .init = its_set_non_coherent,
> > + },
>
> For the records, that requires adding a gic_enable_of_quirks() call for the
> ITS DT node that at the moment is not needed, something like this:
>
> -- >8 --
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 25a12b46ce35..3ae3cb9aadd9 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -4826,6 +4826,10 @@ static void its_enable_quirks(struct its_node *its)
> u32 iidr = readl_relaxed(its->base + GITS_IIDR);
>
> gic_enable_quirks(iidr, its_quirks, its);
> +
> + if (is_of_node(its->fwnode_handle))
> + gic_enable_of_quirks(to_of_node(its->fwnode_handle),
> + its_quirks, its);
> }
>
> static int its_save_disable(void)
>
> > {
> > }
> > };
> > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> > index eedfa8e9f077..7f518c0ae723 100644
> > --- a/drivers/irqchip/irq-gic-v3.c
> > +++ b/drivers/irqchip/irq-gic-v3.c
> > @@ -1857,6 +1857,14 @@ static bool gic_enable_quirk_arm64_2941627(void *data)
> > return true;
> > }
> >
> > +static bool rd_set_non_coherent(void *data)
> > +{
> > + struct gic_chip_data *d = data;
> > +
> > + d->rdists.flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE;
> > + return true;
> > +}
> > +
> > static const struct gic_quirk gic_quirks[] = {
> > {
> > .desc = "GICv3: Qualcomm MSM8996 broken firmware",
> > @@ -1923,6 +1931,11 @@ static const struct gic_quirk gic_quirks[] = {
> > .mask = 0xff0f0fff,
> > .init = gic_enable_quirk_arm64_2941627,
> > },
> > + {
> > + .desc = "GICv3: non-coherent attribute",
> > + .property = "dma-noncoherent",
> > + .init = rd_set_non_coherent,
> > + },
> > {
> > }
> > };
I have tested this patch above on my deivce and it works well. Looking forward the official release.
