On Mon, 28 Aug 2023 13:19:39 -0500
Chris Morgan <macroalpha82@xxxxxxxxx> wrote:
Hi,
> From: Chris Morgan <macromorgan@xxxxxxxxxxx>
>
> Add the EHCI and OHCI controller to the Allwinner v3s to support using
> USB in host mode.
>
> Signed-off-by: Chris Morgan <macromorgan@xxxxxxxxxxx>
Looks good now, and the PHY connection is correct, even though the
current code is ... interesting in this regard. It looks like the
problem is more with the sunxi MUSB glue driver, though. Anyway:
Addresses, IRQs, clocks and resets checked against the manual:
Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx>
Cheers,
Andre
> ---
> arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 23 ++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
> index c87476ea31e2..e8a04476b776 100644
> --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
> @@ -319,6 +319,29 @@ usbphy: phy@1c19400 {
> #phy-cells = <1>;
> };
>
> + ehci: usb@1c1a000 {
> + compatible = "allwinner,sun8i-v3s-ehci", "generic-ehci";
> + reg = <0x01c1a000 0x100>;
> + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
> + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> + ohci: usb@1c1a400 {
> + compatible = "allwinner,sun8i-v3s-ohci", "generic-ohci";
> + reg = <0x01c1a400 0x100>;
> + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
> + <&ccu CLK_USB_OHCI0>;
> + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> ccu: clock@1c20000 {
> compatible = "allwinner,sun8i-v3s-ccu";
> reg = <0x01c20000 0x400>;
