On 27/08/2023 22:36, Tomer Maimon wrote: > Add pinctrl and GPIO controller driver support to Arbel BMC NPCM8XX SoC. > > Arbel BMC NPCM8XX pinctrl driver based on Poleg NPCM7XX, except the > pin mux mapping difference the NPCM8XX GPIO supports adjust debounce > period time. > > Signed-off-by: Tomer Maimon <tmaimon77@xxxxxxxxx> > --- > drivers/pinctrl/nuvoton/Kconfig | 14 + > drivers/pinctrl/nuvoton/Makefile | 1 + > drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 2491 +++++++++++++++++++++ > 3 files changed, 2506 insertions(+) > create mode 100644 drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > > diff --git a/drivers/pinctrl/nuvoton/Kconfig b/drivers/pinctrl/nuvoton/Kconfig > index 8fe61b348181..e5883f99c749 100644 > --- a/drivers/pinctrl/nuvoton/Kconfig > +++ b/drivers/pinctrl/nuvoton/Kconfig > @@ -32,3 +32,17 @@ config PINCTRL_NPCM7XX > help > Say Y here to enable pin controller and GPIO support > for Nuvoton NPCM750/730/715/705 SoCs. > + > +config PINCTRL_NPCM8XX > + tristate "Pinctrl and GPIO driver for Nuvoton NPCM8XX" > + depends on ARCH_NPCM || COMPILE_TEST > + select PINMUX > + select PINCONF > + select GENERIC_PINCONF > + select GPIOLIB > + select GPIO_GENERIC > + select GPIOLIB_IRQCHIP > + help > + Say Y or M here to enable pin controller and GPIO support for > + the Nuvoton NPCM8XX SoC. This is strongly recommended when > + building a kernel that will run on this chip. > \ No newline at end of file Still wrong. Please check your commit or your patches before sending. Best regards, Krzysztof
