Add StarFive JH7110 PWM controller node and add PWM pins configuration
on VisionFive 2 board.
Reviewed-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
Signed-off-by: William Qiu <william.qiu@xxxxxxxxxxxxxxxx>
---
.../jh7110-starfive-visionfive-2.dtsi | 22 +++++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 9 ++++++++
2 files changed, 31 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index fa0061eb33a7..eba7331e1fe1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -143,6 +143,12 @@ &i2c6 {
status = "okay";
};
+&ptc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins>;
+ status = "okay";
+};
+
&sysgpio {
i2c0_pins: i2c0-0 {
i2c-pins {
@@ -200,6 +206,22 @@ GPOEN_SYS_I2C6_DATA,
};
};
+ pwm_pins: pwm-0 {
+ pwm-pins {
+ pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
+ GPOEN_SYS_PWM0_CHANNEL0,
+ GPI_NONE)>,
+ <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
+ GPOEN_SYS_PWM0_CHANNEL1,
+ GPI_NONE)>;
+ bias-disable;
+ drive-strength = <12>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ };
+
uart0_pins: uart0-0 {
tx-pins {
pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index ec2e70011a73..2c808ea3ed40 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -473,6 +473,15 @@ i2c6: i2c@12060000 {
status = "disabled";
};
+ ptc: pwm@120d0000 {
+ compatible = "starfive,jh7110-pwm";
+ reg = <0x0 0x120d0000 0x0 0x10000>;
+ clocks = <&syscrg JH7110_SYSCLK_PWM_APB>;
+ resets = <&syscrg JH7110_SYSRST_PWM_APB>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
syscrg: clock-controller@13020000 {
compatible = "starfive,jh7110-syscrg";
reg = <0x0 0x13020000 0x0 0x10000>;
--
2.34.1
