On 8/21/23 19:59, Vladimir Oltean wrote: > On Mon, Aug 21, 2023 at 07:39:15PM -0400, Sean Anderson wrote: >> Well, I think we should take the opportunity to think about the hardware >> which exists and how we plan to model it. IMO grouping lanes into a >> single phy simplifies both the phy driver and the mac driver. > > Ok, but ungrouped for backplane and grouped for !backplane? For the KR > link modes, parallel link training, with separate consumers per lanes in > a group, will be needed per lane. Hm, this is the sort of thing I hadn't considered since separate link training isn't necessary for lynx 10g. But couldn't this be done by adding a "lane" parameter to phy_configure_opts_xgkr? Although, I am not sure how the driver is supposed to figure out what coefficients to use. c73 implies that the training frame should be sent on each lane. So I expected that there would be four copies of the link coefficient registers. However, when reading the LX2160ARM, I only saw one set of registers (e.g. 26.6.3.3). So is link training done serially? I didn't see anything like a "lane select" field. --Sean
