On 24/08/2023 18:46, Jerome Brunet wrote: > From: Alexander Stein <alexander.stein@xxxxxxxxxxx> > > Convert Amlogic AXG Audio Clock Controller binding to yaml. > ... > + reg: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 29 > + > + # All clocks except pclk are optional inputs of the controller > + # which may or may not be wired in depending on SoC variants, boards config, etc ... > + # The order in which those clocks appear is unpredictable and does not matter. > + # Lacking a better way to describe this, the optional clocks are repeated 28 times. Use pattern. Best regards, Krzysztof
