On Mon, 21 Aug 2023 12:16:05 -0400, Frank Li wrote:
> This patch series introduces support for the eDMA version 3 from
> Freescale. The eDMA v3 brings alterations in the register layout,
> particularly, the separation of channel control registers into
> different channels. The Transfer Control Descriptor (TCD) layout,
> however, remains identical with only the offset being changed.
>
> The first 11 patches aim at tidying up the existing Freescale
> eDMA code and laying the groundwork for the integration of eDMA v3
> support.
>
> [...]
Applied, thanks!
[01/12] dmaengine: fsl-edma: fix build error when arch is s390
commit: 8b9aee8073a5f3e0c2e418d45a7969270ea576c6
[02/12] dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.c
commit: 66aac8ea0a6c79729f99087b1c5a596938e5d838
[03/12] dmaengine: fsl-edma: transition from bool fields to bitmask flags in drvdata
commit: 9e006b243962a42f6927d2d9fe1a7b0a29f45265
[04/12] dmaengine: fsl-edma: Remove enum edma_version
commit: c26e611433aaa064691343c0168f4671eb5cfa42
[05/12] dmaengine: fsl-edma: move common IRQ handler to common.c
commit: 79434f9b97361601e65e0f5576e9760fefebf19a
[06/12] dmaengine: fsl-edma: simply ATTR_DSIZE and ATTR_SSIZE by using ffs()
commit: ee2dda06465a3b0f533c829a5bdc2ff15588d8e0
[07/12] dmaengine: fsl-edma: refactor using devm_clk_get_enabled
commit: a9903de3aa16731846bf924342eca44bdabe9be6
[08/12] dmaengine: fsl-edma: move clearing of register interrupt into setup_irq function
commit: f5b3ba52f36adcda7801fba99c414975f19c85d4
[09/12] dmaengine: fsl-edma: refactor chan_name setup and safety
commit: 9b05554c5ca6829a60c610191d45f244d8726e95
[10/12] dmaengine: fsl-edma: move tcd into struct fsl_dma_chan
commit: 7536f8b371adcc1c4f7ed7ca579da24bdeb14b6f
[11/12] dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string
commit: 6eb439dff645a1f61a710abfc0d37a50e4d43d1a
[12/12] dmaengine: fsl-edma: integrate v3 support
commit: 72f5801a4e2b7122ed8ff5672ea965a0b3458e6b
Best regards,
--
~Vinod
