Hi Conor:
Thanks for your reply.
On Tue, Aug 15, 2023 at 10:09 PM Conor Dooley <conor@xxxxxxxxxx> wrote:
>
> On Tue, Aug 15, 2023 at 04:51:10PM +0800, Binbin Zhou wrote:
> > Add DeviceTree file for Loongson-2K0500 processor, which integrates one
> > 64-bit dual emission superscalar LA264 processor core.
> >
> > Signed-off-by: Binbin Zhou <zhoubinbin@xxxxxxxxxxx>
> > ---
> > arch/loongarch/boot/dts/Makefile | 2 +
> > .../boot/dts/loongson-2k0500-ref.dts | 115 +++++++++
> > arch/loongarch/boot/dts/loongson-2k0500.dtsi | 244 ++++++++++++++++++
> > 3 files changed, 361 insertions(+)
> > create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts
> > create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
> >
> > diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile
> > index 1e24cdb5180a..aa0b21d73d4e 100644
> > --- a/arch/loongarch/boot/dts/Makefile
> > +++ b/arch/loongarch/boot/dts/Makefile
> > @@ -1,3 +1,5 @@
> > # SPDX-License-Identifier: GPL-2.0-only
> >
> > +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb
> > +
> > obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
> > diff --git a/arch/loongarch/boot/dts/loongson-2k0500-ref.dts b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts
> > new file mode 100644
> > index 000000000000..c89662e5a296
> > --- /dev/null
> > +++ b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts
> > @@ -0,0 +1,115 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2023 Loongson Technology Corporation Limited
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "loongson-2k0500.dtsi"
> > +
> > +/ {
> > + compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
> > + model = "Loongson-2K0500 Reference Board";
> > +
> > + aliases {
> > + ethernet0 = &gmac0;
> > + ethernet1 = &gmac1;
> > + serial0 = &uart0;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + bootargs = "earlycon";
> > + };
> > +
> > + cpu_clk: cpu-clk {
> > + #clock-cells = <0>;
> > + compatible = "fixed-clock";
> > + clock-frequency = <500000000>;
> > + };
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu-map {
> > + cluster0 {
> > + core0 {
> > + cpu = <&cpu0>;
> > + };
> > + };
> > + };
> > +
> > + cpu0: cpu@0 {
> > + compatible = "loongson,la264";
> > + device_type = "cpu";
> > + reg = <0x0>;
> > + clocks = <&cpu_clk>;
> > + };
> > + };
>
> I've not read this whole patch, but from a glance - why is the cpu node
> in the board file, not the soc one?
I'm very sorry, that was my mistake. cpu node should really be part of
soc, I'll put it in dtsi.
Thanks.
Binbin
