As we know, some Loongson-2K CPUs are single-core, e.g. Loongson-2K0500,
and the "isr1" means routing interrupts to core1, which should be
optional. So add maxItems/minItems limits to reg/reg-names.
Also, The interrupt-names attribute represents a list of parent
interrupt names that should change with interrupts.
Signed-off-by: Binbin Zhou <zhoubinbin@xxxxxxxxxxx>
---
.../interrupt-controller/loongson,liointc.yaml | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
index 00b570c82903..adb428211a72 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
@@ -11,7 +11,7 @@ maintainers:
description: |
This interrupt controller is found in the Loongson-3 family of chips and
- Loongson-2K1000 chip, as the primary package interrupt controller which
+ Loongson-2K series chips, as the primary package interrupt controller which
can route local I/O interrupt to interrupt lines of cores.
allOf:
@@ -33,6 +33,7 @@ properties:
- const: main
- const: isr0
- const: isr1
+ minItems: 2
interrupt-controller: true
@@ -45,11 +46,9 @@ properties:
interrupt-names:
description: List of names for the parent interrupts.
items:
- - const: int0
- - const: int1
- - const: int2
- - const: int3
+ pattern: int[0-3]
minItems: 1
+ maxItems: 4
'#interrupt-cells':
const: 2
@@ -73,7 +72,6 @@ required:
- '#interrupt-cells'
- loongson,parent_int_map
-
unevaluatedProperties: false
if:
@@ -86,7 +84,8 @@ if:
then:
properties:
reg:
- minItems: 3
+ minItems: 2
+ maxItems: 3
required:
- reg-names
@@ -113,7 +112,6 @@ examples:
<0x0f000000>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
-
};
...
--
2.39.3
