The driver reads only one clock frequency, and the schema does not
allow more than one frequency here.
Signed-off-by: David Heidelberg <david@xxxxxxx>
---
arch/arm/boot/dts/qcom/qcom-msm8660.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi
index 78023ed2fdf7..23f7b67d9d61 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi
@@ -109,8 +109,7 @@ timer@2000000 {
<1 1 0x301>,
<1 2 0x301>;
reg = <0x02000000 0x100>;
- clock-frequency = <27000000>,
- <32768>;
+ clock-frequency = <27000000>;
cpu-offset = <0x40000>;
};
--
2.40.1
