On 11/08/23 02:49, Andrew Davis wrote: > On 8/9/23 11:53 PM, Vignesh Raghavendra wrote: >> From: Bryan Brattlof <bb@xxxxxx> >> >> Add basic support for the AM62P5-SK platform with UART and ramdisk as > > We usually call the boards "SK-AM6xx", with the SK- first, assuming this SK-AM62P-LP is the orderable part number but the silk screen reads AM62P SK and so does the EEPROM Board_name field. So I am going just use that in the bindings as well as file name similar have we have been naming so far. > board is named the same way you should fix that here and in the files. > >> rootfs. >> >> Schematics is at https://www.ti.com/lit/zip/sprr487 >> >> Signed-off-by: Bryan Brattlof <bb@xxxxxx> >> Signed-off-by: Vignesh Raghavendra <vigneshr@xxxxxx> >> --- >> arch/arm64/boot/dts/ti/Makefile | 3 + >> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 169 ++++++++++++++++++++++++ >> 2 files changed, 172 insertions(+) >> create mode 100644 arch/arm64/boot/dts/ti/k3-am62p5-sk.dts >> >> diff --git a/arch/arm64/boot/dts/ti/Makefile >> b/arch/arm64/boot/dts/ti/Makefile >> index 437a3d7e8e3a..5a09cad74c44 100644 >> --- a/arch/arm64/boot/dts/ti/Makefile >> +++ b/arch/arm64/boot/dts/ti/Makefile >> @@ -23,6 +23,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb >> # Boards with AM62Ax SoC >> dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb >> +# Boards with AM62Px SoC >> +dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb >> + >> # Boards with AM64x SoC >> dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb >> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts >> b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts >> new file mode 100644 >> index 000000000000..b0882211448e >> --- /dev/null >> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts >> @@ -0,0 +1,169 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Device Tree file for the AM62P5-SK >> + * Copyright (C) 2023 Texas Instruments Incorporated - >> https://www.ti.com/ >> + * >> + * Schematics: https://www.ti.com/lit/zip/sprr487 >> + */ >> + >> +/dts-v1/; >> + >> +#include "k3-am62p5.dtsi" >> + >> +/ { >> + compatible = "ti,am62p5-sk", "ti,am62p5"; >> + model = "Texas Instruments AM62P5 SK"; >> + >> + aliases { >> + serial0 = &wkup_uart0; >> + serial2 = &main_uart0; >> + serial3 = &main_uart1; >> + }; >> + >> + chosen { >> + stdout-path = "serial2:115200n8"; > > You can set the path here directly to the node: > > stdout-path = &main_uart0; > > Then the default baud rate can be defined/selected in > the node with: > > current-speed = <115200>; > Make sense... >> + }; >> + >> + memory@80000000 { >> + /* 8G RAM */ >> + reg = <0x00000000 0x80000000 0x00000000 0x80000000>, >> + <0x00000008 0x80000000 0x00000001 0x80000000>; >> + device_type = "memory"; >> + bootph-pre-ram; >> + }; >> + >> + reserved-memory { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges; >> + >> + secure_tfa_ddr: tfa@9e780000 { >> + reg = <0x00 0x9e780000 0x00 0x80000>; >> + alignment = <0x1000>; > > You cannot allocate from this memory, no need for alignment. > >> + no-map; >> + }; >> + >> + secure_ddr: optee@9e800000 { >> + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ >> + alignment = <0x1000>; > > Same. > >> + no-map; >> + }; >> + >> + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { >> + compatible = "shared-dma-pool"; >> + reg = <0x00 0x9c900000 0x00 0x01e00000>; >> + no-map; >> + }; >> + }; >> +}; >> + >> +&cbass_main { >> + bootph-pre-ram; > > I'm thinking we will need this for any AM62P based board, should > we bubble this up into the common .dtsi files? Same for most of the > other instances at the end of this file. will fill all the above. Thanks! > > Andrew > >> +}; >> + >> +&main_pmx0 { >> + status = "okay"; >> + bootph-pre-ram; >> + >> + main_uart0_pins_default: main-uart0-default-pins { >> + bootph-pre-ram; >> + pinctrl-single,pins = < >> + AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ >> + AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ >> + AM62PX_IOPAD(0x1d0, PIN_INPUT, 0) /* (A23) UART0_CTSn */ >> + AM62PX_IOPAD(0x1d4, PIN_OUTPUT, 0) /* (C22) UART0_RTSn */ >> + >; >> + }; >> + >> + main_uart1_pins_default: main-uart1-default-pins { >> + bootph-pre-ram; >> + pinctrl-single,pins = < >> + AM62PX_IOPAD(0x194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3 */ >> + AM62PX_IOPAD(0x198, PIN_OUTPUT, 2) /* (E25) >> MCASP0_AXR2 */ >> + AM62PX_IOPAD(0x1ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR */ >> + AM62PX_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (G20) >> MCASP0_ACLKR */ >> + >; >> + }; >> +}; >> + >> +&main_timer0 { >> + bootph-pre-ram; >> +}; >> + >> +&main_uart0 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&main_uart0_pins_default>; >> + status = "okay"; >> + bootph-pre-ram; >> +}; >> + >> +&main_uart1 { >> + /* Main UART1 is used by TIFS firmware */ >> + pinctrl-names = "default"; >> + pinctrl-0 = <&main_uart1_pins_default>; >> + status = "reserved"; >> + bootph-pre-ram; >> +}; >> + >> +&cbass_mcu { >> + bootph-pre-ram; >> +}; >> + >> +&mcu_pmx0 { >> + status = "okay"; >> + bootph-pre-ram; >> + >> + wkup_uart0_pins_default: wkup-uart0-default-pins { >> + bootph-pre-ram; >> + pinctrl-single,pins = < >> + AM62PX_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) >> WKUP_UART0_CTSn */ >> + AM62PX_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) >> WKUP_UART0_RTSn */ >> + AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) >> WKUP_UART0_RXD */ >> + AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) >> WKUP_UART0_TXD */ >> + >; >> + }; >> +}; >> + >> +&cbass_wakeup { >> + bootph-pre-ram; >> +}; >> + >> +&wkup_uart0 { >> + /* WKUP UART0 is used by DM firmware */ >> + pinctrl-names = "default"; >> + pinctrl-0 = <&wkup_uart0_pins_default>; >> + status = "reserved"; >> + bootph-pre-ram; >> +}; >> + >> +&wkup_conf { >> + bootph-pre-ram; >> +}; >> + >> +&chipid { >> + bootph-pre-ram; >> +}; >> + >> +&dmss { >> + bootph-pre-ram; >> +}; >> + >> +&dmsc { >> + bootph-pre-ram; >> +}; >> + >> +&k3_pds { >> + bootph-pre-ram; >> +}; >> + >> +&k3_clks { >> + bootph-pre-ram; >> +}; >> + >> +&k3_reset { >> + bootph-pre-ram; >> +}; >> + >> +&secure_proxy_main { >> + bootph-pre-ram; >> +}; -- Regards Vignesh
