On 2023/8/10 19:31, Emil Renner Berthing wrote: > On Wed, 9 Aug 2023 at 03:41, William Qiu <william.qiu@xxxxxxxxxxxxxxxx> wrote: >> >> Enable DCDC1 node for vmmc-supply and enable ALDO4 node for >> vqmmc-supply. >> >> Signed-off-by: William Qiu <william.qiu@xxxxxxxxxxxxxxxx> >> --- >> .../starfive/jh7110-starfive-visionfive-2.dtsi | 16 ++++++++++++++++ >> 1 file changed, 16 insertions(+) >> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi >> index d2f3b9eb859b..d67e26b9c791 100644 >> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi >> @@ -165,12 +165,28 @@ axp15060: pmic@36 { >> #interrupt-cells = <1>; >> >> regulators { >> + vcc_3v3: dcdc1 { >> + regulator-boot-on; >> + regulator-always-on; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-name = "vcc_3v3"; >> + }; >> + >> vdd_cpu: dcdc2 { >> regulator-always-on; >> regulator-min-microvolt = <500000>; >> regulator-max-microvolt = <1540000>; >> regulator-name = "vdd-cpu"; >> }; >> + >> + emmc_vdd: aldo4 { >> + regulator-boot-on; >> + regulator-always-on; > > Hi William, > > Just a question: You mark these regulators as always-on, so they'll > never be shut off even if the device is suspended. Is that because the > mmc driver can't deal with reinitializing the mmc/sd-card if the card > has been shut off while suspended or is there some other reason to > mark them always-on? > Hi Emil, Because now hibernation's storage medium is currently SD/eMMC, so we need to mark SD/eMMC always-on. Best Regards, William >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-name = "emmc_vdd"; >> + }; >> }; >> }; >> }; >> -- >> 2.34.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@xxxxxxxxxxxxxxxxxxx >> http://lists.infradead.org/mailman/listinfo/linux-riscv