On 8/9/23 16:28, Stephen Boyd wrote:
Quoting Dinh Nguyen (2023-08-08 04:03:47)
Hi Stephen/Mike,
On 7/31/23 20:02, niravkumar.l.rabara@xxxxxxxxx wrote:
From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
Add support for Intel's SoCFPGA Agilex5 platform. The clock manager
driver for the Agilex5 is very similar to the Agilex platform,we can
re-use most of the Agilex clock driver.
Signed-off-by: Teh Wen Ping <wen.ping.teh@xxxxxxxxx>
Reviewed-by: Dinh Nguyen <dinguyen@xxxxxxxxxx>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
---
drivers/clk/socfpga/clk-agilex.c | 433 ++++++++++++++++++++++++++++++-
1 file changed, 431 insertions(+), 2 deletions(-)
If you're ok with this patch, can I take this through armsoc?
Usually any binding files go through arm-soc and clk tree but the driver
only goes through clk tree via a PR. Is that possible here?
Ok. Should be fine in this case.
Thanks,
Dinh
