Hi Frank, kernel test robot noticed the following build errors: [auto build test ERROR on pci/for-linus] [also build test ERROR on linus/master v6.5-rc4 next-20230804] [cannot apply to pci/next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Frank-Li/PCI-Add-macro-PCIE_PME_TO_L2_TIMEOUT_US/20230803-230808 base: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git for-linus patch link: https://lore.kernel.org/r/20230803150409.271155-3-Frank.Li%40nxp.com patch subject: [PATCH v8 2/3] PCI: dwc: Implement general suspend/resume functionality for L2/L3 transitions config: x86_64-randconfig-x005-20230731 (https://download.01.org/0day-ci/archive/20230804/202308042251.yGAFqeDw-lkp@xxxxxxxxx/config) compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07) reproduce: (https://download.01.org/0day-ci/archive/20230804/202308042251.yGAFqeDw-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202308042251.yGAFqeDw-lkp@xxxxxxxxx/ All errors (new ones prefixed by >>): >> drivers/pci/controller/dwc/pcie-designware-host.c:835:5: error: use of undeclared identifier 'PCIE_PME_TO_L2_TIMEOUT_US' PCIE_PME_TO_L2_TIMEOUT_US, false, pci); ^ drivers/pci/controller/dwc/pcie-designware-host.c:834:5: error: use of undeclared identifier 'PCIE_PME_TO_L2_TIMEOUT_US' PCIE_PME_TO_L2_TIMEOUT_US/10, ^ 2 errors generated. vim +/PCIE_PME_TO_L2_TIMEOUT_US +835 drivers/pci/controller/dwc/pcie-designware-host.c 811 812 int dw_pcie_suspend_noirq(struct dw_pcie *pci) 813 { 814 u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); 815 u32 val; 816 int ret; 817 818 /* 819 * If L1SS is supported, then do not put the link into L2 as some 820 * devices such as NVMe expect low resume latency. 821 */ 822 if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1) 823 return 0; 824 825 if (dw_pcie_get_ltssm(pci) <= DW_PCIE_LTSSM_DETECT_ACT) 826 return 0; 827 828 if (!pci->pp.ops->pme_turn_off) 829 return 0; 830 831 pci->pp.ops->pme_turn_off(&pci->pp); 832 833 ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE, 834 PCIE_PME_TO_L2_TIMEOUT_US/10, > 835 PCIE_PME_TO_L2_TIMEOUT_US, false, pci); 836 if (ret) { 837 dev_err(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val); 838 return ret; 839 } 840 841 if (pci->pp.ops->host_deinit) 842 pci->pp.ops->host_deinit(&pci->pp); 843 844 pci->suspended = true; 845 846 return ret; 847 } 848 EXPORT_SYMBOL_GPL(dw_pcie_suspend_noirq); 849 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
