On Thu, Aug 03, 2023 at 04:25:40PM +0000, Biju Das wrote:
> > Subject: Re: [PATCH 1/3] dt-bindings: clock: versaclock3: Document
> > clock-output-names
> >
> > On Wed, Aug 02, 2023 at 01:25:08PM +0100, Biju Das wrote:
> > > Document clock-output-names property. Update the example according to
> > > Table 3. ("Output Source") in the 5P35023 datasheet.
> > >
> > > While at it, replace clocks phandle in the example from x1_x2->x1 as
> > > X2 is a different 32768 kHz crystal.
> > >
> > > Suggested-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> > > Closes:
> > > https://lore.kernel.org/all/CAMuHMdUHD+bEco=WYTYWsTAyRt3dTQQt4Xpaejss0
> > > Y2ZpLCMNg@xxxxxxxxxxxxxx/
> > > Fixes: a03d23f860eb ("dt-bindings: clock: Add Renesas versa3 clock
> > > generator bindings")
> >
> > Nothing in this commit message explains why this is a fix for this
> > binding addition :(
>
> Basically, it fixes "assigned-clock-rates" for each clock output in the example. Now it is based on Table 3. ("Output Source") in the 5P35023 datasheet(ie: 0= REF, 1=SE1, 2=SE2, 3=SE3, 4=DIFF1, 5=DIFF2).
>
> The newly added clock-output-names in the example are based on the above table.
>
> I have added fixes tag, because this patch fixes the clock mapping in the example as per the HW manual.
>
> Please let me know should I drop fixes tag??
I'm just asking for an explanation in the commit message as to what was
actually wrong in the first place. The commit message says 3 things of
which it's hard to know what is actually a fix without opening & reading
the linked thread on lore.
Cheers,
Conor.
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