Thanks Vaishnav
On 8/3/2023 4:43 PM, Vaishnav Achath wrote:
On 03/08/23 16:01, Kumar, Udit wrote:
Hi Esteban
Hi Esteban, Udit,
[...]
Signed-off-by: Esteban Blanc <eblanc@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 199 +++++++++++++++++++
1 file changed, 199 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
index d57dd43da0ef..5348aafe3277 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
@@ -61,6 +61,15 @@ J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20)
MCU_OSPI0_LBCLKO */
};
};
+&wkup_pmx1 {
+ pmic_irq_pins_default: pmic-irq-pins-default {
+ pinctrl-single,pins = <
+ /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
+ J721S2_WKUP_IOPAD(0x28, PIN_INPUT, 7)
+ >;
I see, this pin is getting shared with OSPI-1 .
I think either OSPI or PMIC could be functional at one time ?
OSPI CS1 is not being used, so the corresponding entry under OSPI1 can be removed.
let me handle this in on going series
https://lore.kernel.org/all/20230802113500.162276-1-u-kumar1@xxxxxx/
Thanks and Regards,
Vaishnav
+ };
+};
+
[...]
