On Tue, Aug 01, 2023 at 09:02:32AM +0800, niravkumar.l.rabara@xxxxxxxxx wrote: > From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx> > > Add clock ID definitions for Intel Agilex5 SoCFPGA. > The registers in Agilex5 handling the clock is named as clock manager. > > Signed-off-by: Teh Wen Ping <wen.ping.teh@xxxxxxxxx> > Reviewed-by: Dinh Nguyen <dinguyen@xxxxxxxxxx> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx> > --- > .../bindings/clock/intel,agilex5-clkmgr.yaml | 41 +++++++ > .../dt-bindings/clock/intel,agilex5-clkmgr.h | 100 ++++++++++++++++++ > 2 files changed, 141 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/intel,agilex5-clkmgr.yaml > create mode 100644 include/dt-bindings/clock/intel,agilex5-clkmgr.h > > diff --git a/Documentation/devicetree/bindings/clock/intel,agilex5-clkmgr.yaml b/Documentation/devicetree/bindings/clock/intel,agilex5-clkmgr.yaml > new file mode 100644 > index 000000000000..60e57a9fb939 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/intel,agilex5-clkmgr.yaml > @@ -0,0 +1,41 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/intel,agilex5-clkmgr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel SoCFPGA Agilex5 clock manager > + > +maintainers: > + - Dinh Nguyen <dinguyen@xxxxxxxxxx> > + > +description: > + The Intel Agilex5 Clock Manager is an integrated clock controller, which > + generates and supplies clock to all the modules. > + > +properties: > + compatible: > + const: intel,agilex5-clkmgr > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + > +additionalProperties: false > + > +examples: > + # Clock controller node: This comment seems utterly pointless. Otherwise this looks okay to me. Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> Thanks, Conor. > + - | > + clkmgr: clock-controller@10d10000 { > + compatible = "intel,agilex5-clkmgr"; > + reg = <0x10d10000 0x1000>; > + #clock-cells = <1>; > + }; > +...
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