On Tue, Jul 25, 2023 at 10:23:34AM -0400, Hugo Villeneuve wrote: > From: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx> > > Bit SRESET (3) is cleared when a reset operation is completed. Having > the IOCONTROL register as non-volatile will always read SRESET as 1, > which is incorrect. > > Also, if IOCONTROL register is not a volatile register, the upcoming > patch "serial: sc16is7xx: fix regression with GPIO configuration" > doesn't work when setting some shared GPIO lines as modem control > lines. > > Therefore mark IOCONTROL register as a volatile register. > > Cc: <stable@xxxxxxxxxxxxxxx> # 6.1.x Why 6.1.y? What commit does this fix? > Signed-off-by: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx> > Reviewed-by: Lech Perczak <lech.perczak@xxxxxxxxxxxxxxx> > Tested-by: Lech Perczak <lech.perczak@xxxxxxxxxxxxxxx> > --- > drivers/tty/serial/sc16is7xx.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c > index 8ae2afc76a9b..306ae512b38a 100644 > --- a/drivers/tty/serial/sc16is7xx.c > +++ b/drivers/tty/serial/sc16is7xx.c > @@ -488,6 +488,7 @@ static bool sc16is7xx_regmap_volatile(struct device *dev, unsigned int reg) > case SC16IS7XX_TXLVL_REG: > case SC16IS7XX_RXLVL_REG: > case SC16IS7XX_IOSTATE_REG: > + case SC16IS7XX_IOCONTROL_REG: > return true; > default: > break; Is this the same as this change: https://lore.kernel.org/all/20230724034727.17335-1-hui.wang@xxxxxxxxxxxxx/ confused, greg k-h
