Add DSI pipeline for Edgeble Neu2 IO board via DT-overlay
The DSI connector in Edgeble Neu2 IO board support different
resolution panels and those compatible is added in another
DT-overlay.
Add Edgeble Neu2 IO DSI connector DT-overlay.
Signed-off-by: Jagan Teki <jagan@xxxxxxxxxx>
---
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
Cc: Conor Dooley <conor+dt@xxxxxxxxxx>
arch/arm/boot/dts/rockchip/Makefile | 1 +
.../rockchip/rv1126-edgeble-neu2-io-dsi.dtso | 112 ++++++++++++++++++
2 files changed, 113 insertions(+)
create mode 100644 arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io-dsi.dtso
diff --git a/arch/arm/boot/dts/rockchip/Makefile b/arch/arm/boot/dts/rockchip/Makefile
index 0f46e18fe275..c8c8e1292650 100644
--- a/arch/arm/boot/dts/rockchip/Makefile
+++ b/arch/arm/boot/dts/rockchip/Makefile
@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1108-elgin-r1.dtb \
rv1108-evb.dtb \
rv1126-edgeble-neu2-io.dtb \
+ rv1126-edgeble-neu2-io-dsi.dtbo \
rk3036-evb.dtb \
rk3036-kylin.dtb \
rk3066a-bqcurie2.dtb \
diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io-dsi.dtso b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io-dsi.dtso
new file mode 100644
index 000000000000..88431e1e30f8
--- /dev/null
+++ b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io-dsi.dtso
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
+ *
+ * DT-overlay for Edgeble Neu2 IO DSI Connector.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm2 0 25000 0>;
+ enable-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&backlight_en>;
+ };
+
+ vcc_lcd_mipi_2: vcc-lcd-mipi-2-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_lcd_mipi_2";
+ enable-active-high;
+ gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc_lcd_mipi_2_en>;
+ regulator-boot-on;
+ vin-supply = <&v3v3_sys>;
+ };
+
+ vcc_1v8_2: vcc-1v8-2-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8_2";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&dsi_dphy {
+ status = "okay";
+};
+
+&dsi {
+ clock-master;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ mipi_out_panel: endpoint {
+ remote-endpoint = <&mipi_in_panel>;
+ };
+ };
+ };
+
+ panel: panel@0 {
+ /* different resolution panels are used, compatibles are in DTO */
+ reg = <0>;
+ vdd-supply = <&vcc_lcd_mipi_2>;
+ vccio-supply = <&vcc_1v8_2>;
+ reset-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_reset>;
+ backlight = <&backlight>;
+
+ port {
+ mipi_in_panel: endpoint {
+ remote-endpoint = <&mipi_out_panel>;
+ };
+ };
+ };
+};
+
+&pinctrl {
+ lcd {
+ backlight_en: backlight-en {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ lcd_reset: lcd-reset {
+ rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vcc_lcd_mipi_2_en: vcc-lcd-mipi-2-en {
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
--
2.25.1
