On Friday 12 December 2014 19:14:00 Stanimir Varbanov wrote: > The PCIe driver reuse the Designware common code for host > and MSI initialization, and also program the Qualcomm > application specific registers. > > Signed-off-by: Stanimir Varbanov <svarbanov@xxxxxxxxxx> Looks nice! > +static int > +qcom_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, u32 *val) > +{ > + if (where == PCI_CLASS_REVISION && size == 4) { > + *val = readl(pp->dbi_base + PCI_CLASS_REVISION); > + *val &= ~(0xffff << 16); > + *val |= PCI_CLASS_BRIDGE_PCI << 16; > + return PCIBIOS_SUCCESSFUL; > + } > + > + return dw_pcie_cfg_read(pp->dbi_base + (where & ~0x3), where, > + size, val); > +} Could you add a comment here to explain what this is for? > +static int __init qcom_pcie_probe(struct platform_device *pdev) > +{ I think it's a bug to mark this function as __init. It breaks deferred probing and detaching/reattaching the device trough sysfs. After you fix that, you can remove the __refdata below. > +static struct platform_driver __refdata qcom_pcie_driver = { > + .probe = qcom_pcie_probe, > + .remove = qcom_pcie_remove, > + .driver = { > + .name = "qcom-pcie", > + .of_match_table = qcom_pcie_match, > + }, > +}; Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html