Hello, This series adds devicetree node for MAIN CPSW2G instance of CPSW Ethernet Switch on TI's J721S2 SoC. Also, a devicetree overlay is added in order to enable MAIN CPSW2G in RGMII-RXID mode using the GESI Expansion Board connected to the J7 Common-Processor-Board. Regards, Siddharth. --- NOTE: This series is based on linux-next tagged next-20230725. v2: https://lore.kernel.org/r/20230710094328.1359377-1-s-vadapalli@xxxxxx/ Changes since v2: - Collect Reviewed-by tag from Ravi Gunasekaran <r-gunasekaran@xxxxxx>. - Rename main_cpsw_mdio_pins_default and rgmii1_pins_default to: main_cpsw_mdio_default_pins and rgmii1_default_pins respectively. - Rename main-cpsw-mdio-pins-default and rgmii1-pins-default to: main-cpsw-mdio-default-pins and rgmii1-default-pins respectively. - The above changes are performed to follow the updated json-schema patch at: https://lore.kernel.org/all/169021456020.3622493.10284534202541859578.robh@xxxxxxxxxx/ - Rebase series on next-20230725. v1: https://lore.kernel.org/r/20230529104913.560045-1-s-vadapalli@xxxxxx/ Changes since v1: - Rebase series on next-20230710. RFC: https://lore.kernel.org/r/20230426105718.118806-1-s-vadapalli@xxxxxx/ Changes since RFC: - Add GESI board product link in the device-tree overlay file. Kishon Vijay Abraham I (2): arm64: dts: ti: k3-j721s2-main: Add main CPSW2G devicetree node arm64: dts: ti: k3-j721s2: Add overlay to enable main CPSW2G with GESI arch/arm64/boot/dts/ti/Makefile | 2 + .../dts/ti/k3-j721s2-evm-gesi-exp-board.dtso | 85 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 69 +++++++++++++++ 3 files changed, 156 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso -- 2.34.1
