RE: [PATCH v1 3/5] dt-bindings: net: Add HPE GXP UMAC

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi Andrew,

Thank you for the feedback.

> > +examples:
> > +  - |
> > +    ethernet@4000 {
> > +      compatible = "hpe,gxp-umac";
> > +      reg = <0x4000 0x80>;
> > +      interrupts = <22>;
> > +      mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */

> Do both ports get the sane MAC address?

No they do not. The first one will get the MAC address, the second
will be an external phy we are managing via the MDIO path.

> > +      ethernet-ports {
> > +        #address-cells = <1>;
> > +        #size-cells = <0>;
> > +
> > +        port@0 {
> > +          reg = <0>;
> > +          phy-handle = <&eth_phy0>;
> > +        };
> > +
> > +        port@1 {
> > +          reg = <1>;
> > +          phy-handle = <&eth_phy1>;
> > +        };
> > +      };
> > +
> > +      mdio {

> This seems to be wrong. You have a standalone MDIO bus driver, not
> part of the MAC address space?

I based this from other yaml examples I found. Is there a better way to
represent it?

Here is what I plan on having the dts/dtsi
look like:

mdio0: mdio@4080 {
	compatible = "hpe,gxp-umac-mdio";
	reg = <0x4080 0x10>;
	#address-cells = <1>;
	#size-cells = <0>;
	ext_phy0: ethernt-phy@0 {
		compatible = "marvell,88e1415","ethernet-phy-ieee802.3-c22";
		phy-mode = "sgmii";
		reg = <0>;
	};
};

mdio1: mdio@5080 {
	compatible = "hpe,gxp-umac-mdio";
	reg = <0x5080 0x10>;
	#address-cells = <1>;
	#size-cells = <0>;
	int_phy0: ethernt-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		phy-mode = "gmii";
                             reg = <0>;
	};

	int_phy1: ethernt-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		phy-mode = "gmii";
		reg = <1>;
	};
};

umac0: ethernet@4000 {
	compatible = "hpe,gxp-umac";
	reg = <0x4000 0x80>;
	interrupts = <10>;
	interrupt-parent = <&vic0>;
	mac-address = [00 00 00 00 00 00];
	ethernet-ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			phy-handle = <&int_phy0>;
		};
		port@1 {
			reg = <1>;
			phy-handle = <&ext_phy0>;
		};
	};
};

Thank you for the help and assistance.

-Nick Hawkins




[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux