Hi James, On Wed, Jul 19, 2023 at 1:01 PM James Hilliard <james.hilliard1@xxxxxxxxx> wrote: > > This patch adds support for the Variscite MX6 SoM Carrier Board. > > This Carrier-Board has the following : > - LVDS interface for the VLCD-CAP-GLD-LVDS 7" LCD 800 x 480 touch display > - HDMI Connector > - USB Host + USB OTG Connector > - 10/100/1000 Mbps Ethernet > - miniPCI-Express slot > - SD Card connector > - Audio Headphone/Line In jack connectors > - S-ATA > - On-board DMIC > - RS485 Header > - CAN bus header > - SPI header > - Camera Interfaces header > - OnBoard RTC with Coin Backup battery socket > - RS232 Debug Header (IDC10) > - RS232 DTE Good, but what exactly has been tested? > Product Page : https://www.variscite.com/product/single-board-computers/var-mx6customboard > > The dts file based on the ones provided by Variscite on their own > kernel, but adapted for mainline. > > Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx> > Signed-off-by: James Hilliard <james.hilliard1@xxxxxxxxx> Is this patch from you or Gregory? If Gregory is the author, then his name should appear in the From: line. > +&iomuxc { > + imx6qdl-var-som-mx6 { This ' imx6qdl-var-som-mx6' should be dropped. > + > + pinctrl_ipu1: ipu1grp { > + fsl,pins = < > + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 > + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 > + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 > + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 > + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 No 0x80000000 please. Use the real pad ctl value instead. This applies globally. &mipi_csi { > + status = "okay"; > + ipu_id = <0>; > + csi_id = <1>; > + v_channel = <0>; > + lanes = <2>; These are all NXP vendor devicetree properties. They do not exist upstream. > + lvds-channel@0 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; > + primary; This property does not exist upstream. > + lvds-channel@1 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; > + primary; Ditto. > +&usbphy1 { > + tx-d-cal = <0x5>; In upstream it is called fsl,tx-d-cal. > +}; > + > +&usbphy2 { > + tx-d-cal = <0x5>; Ditto.
