The i.MX8MP Reference Manual rev 1 06/2021, section 11.7.2.5 "Timestamp Support" indicates the PTP timestamp clock expects a typical frequency of 125MHz. As this also improves the precision of the measured timestamps: assign appropriate 125MHz Clock parent. As no one except the timestamping counter uses this clock, there are no side-effects of this change in other peripherals. Signed-off-by: Johannes Zink <j.zink@xxxxxxxxxxxxxx> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 6f2f50e1639c..7f80dff914c2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1334,7 +1334,7 @@ eqos: ethernet@30bf0000 { <&clk IMX8MP_CLK_ENET_QOS_TIMER>, <&clk IMX8MP_CLK_ENET_QOS>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>, - <&clk IMX8MP_SYS_PLL2_100M>, + <&clk IMX8MP_SYS_PLL2_125M>, <&clk IMX8MP_SYS_PLL2_125M>; assigned-clock-rates = <0>, <100000000>, <125000000>; nvmem-cells = <ð_mac2>; --- base-commit: ba345b77fae7054d0cbd033283c47033e45db6d8 change-id: 20230719-imx8mp_enet_qos_use_125mhz_clock-1c4611c979ba Best regards, -- Johannes Zink <j.zink@xxxxxxxxxxxxxx>