On 18/07/2023 08:10, Shubhrajyoti Datta wrote: > Convert the xlnx,zynqmp-clk.txt to yaml. > versal-clk.yaml already exists that's why zynqmp is converted and > merged. > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxx> > --- > Please let me know if the mergeing of the versal and zynqmp is fine > or if a seperate yaml is preferred. > > Rebased on [1] to avoid merge conflict. > > [1] https://lore.kernel.org/all/20230620110137.5701-1-shubhrajyoti.datta@xxxxxxx/ > > .../bindings/clock/xlnx,versal-clk.yaml | 73 +++++++++++++++++-- > .../bindings/clock/xlnx,zynqmp-clk.txt | 63 ---------------- > 2 files changed, 65 insertions(+), 71 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/xlnx,zynqmp-clk.txt > > diff --git a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml > index e9cf747bf89b..1b69e2590478 100644 > --- a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml > +++ b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml > @@ -20,6 +20,7 @@ properties: > compatible: > oneOf: > - const: xlnx,versal-clk > + - const: xlnx,zynqmp-clk These two are enum. > - items: > - enum: > - xlnx,versal-net-clk > @@ -31,16 +32,9 @@ properties: > clocks: > description: List of clock specifiers which are external input > clocks to the given clock controller. > - items: > - - description: reference clock > - - description: alternate reference clock > - - description: alternate reference clock for programmable logic Missing constraints. > > clock-names: > - items: > - - const: ref > - - const: alt_ref > - - const: pl_alt_ref > + minItems: 3 This cannot be min. You wanted maxItems. > > required: > - compatible > @@ -50,6 +44,60 @@ required: > > additionalProperties: false > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - xlnx,versal-clk > + > + then: > + properties: > + clocks: > + items: > + - description: reference clock > + - description: alternate reference clock > + - description: alternate reference clock for programmable logic > + > + clock-names: > + items: > + - const: ref > + - const: alt_ref > + - const: pl_alt_ref > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - xlnx,zynqmp-clk > + > + then: > + properties: > + clocks: > + minItems: 5 > + items: > + - description: PS reference clock > + - description: reference clock for video system > + - description: alternative PS reference clock > + - description: auxiliary reference clock > + - description: transceiver reference clock > + - description: (E)MIO clock source (Optional clock) So you have 5-6 items. > + > + clock-names: > + minItems: 5 > + items: > + - const: pss_ref_clk > + - const: video_clk > + - const: pss_alt_ref_clk > + - const: aux_ref_clk > + - const: gt_crx_ref_clk > + - const: mio_clk_50_or_51 > + - pattern: "^mio_clk[00-77]+.*$" > + - pattern: "gem[0-3]+_emio_clk.*$" > + - pattern: "swdt[0-1]+_ext_clk.*$" But here more. It's a mess. > + > examples: > - | > firmware { > @@ -64,4 +112,13 @@ examples: > }; > }; > }; > + > + clock-controller1{ clock-controller > + #clock-cells = <1>; > + compatible = "xlnx,zynqmp-clk"; > + clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, > + <&aux_ref_clk>, <>_crx_ref_clk>; > + clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", > + "aux_ref_clk", "gt_crx_ref_clk"; > + }; Best regards, Krzysztof