On 2023/7/18 1:13, Aurelien Jarno wrote:
> Hi,
>
> On 2023-07-04 17:04, William Qiu wrote:
>> Add the quad spi controller node for the StarFive JH7110 SoC.
>>
>> Co-developed-by: Ziv Xu <ziv.xu@xxxxxxxxxxxxxxxx>
>> Signed-off-by: Ziv Xu <ziv.xu@xxxxxxxxxxxxxxxx>
>> Signed-off-by: William Qiu <william.qiu@xxxxxxxxxxxxxxxx>
>> Reviewed-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
>> ---
>> .../jh7110-starfive-visionfive-2.dtsi | 32 +++++++++++++++++++
>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 +++++++++++
>> 2 files changed, 50 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> index 2a6d81609284..983b683e2f27 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> @@ -126,6 +126,38 @@ &i2c6 {
>> status = "okay";
>> };
>>
>> +&qspi {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + nor_flash: flash@0 {
>> + compatible = "jedec,spi-nor";
>> + reg = <0>;
>> + cdns,read-delay = <5>;
>> + spi-max-frequency = <12000000>;
>> + cdns,tshsl-ns = <1>;
>> + cdns,tsd2d-ns = <1>;
>> + cdns,tchsh-ns = <1>;
>> + cdns,tslch-ns = <1>;
>> +
>> + partitions {
>> + compatible = "fixed-partitions";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + spl@0 {
>> + reg = <0x0 0x20000>;
>> + };
>> + uboot@100000 {
>> + reg = <0x100000 0x300000>;
>> + };
>> + data@f00000 {
>> + reg = <0xf00000 0x100000>;
>> + };
>
> It appears that this uses the old layout for the SPI flash. The new
> layout is described there:
>
> https://doc-en.rvspace.org/VisionFive2/Boot_UG/JH7110_SDK/boot_address_allocation.html
>
> Regards
> Aurelien
>
I'll take a look, and use it then.
Thanks for your comments.
Best regards,
William
