On 7/16/23 21:07, huaqian.li@xxxxxxxxxxx wrote:
From: Li Hua Qian <huaqian.li@xxxxxxxxxxx> TI RTI (Real Time Interrupt) Watchdog doesn't support to record the watchdog cause. Add a reserved memory to know the last reboot was caused by the watchdog card. In the reserved memory, some specific info will be saved to indicate whether the watchdog reset was triggered in last boot. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Reviewed-by: Conor Dooley <conor@xxxxxxxxxx> Reviewed-by: Rob Herring <robh@xxxxxxxxxx> Signed-off-by: Li Hua Qian <huaqian.li@xxxxxxxxxxx>
Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>
--- .../bindings/watchdog/ti,rti-wdt.yaml | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml index fc553211e42d..4b66c4fcdf35 100644 --- a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml @@ -34,6 +34,20 @@ properties: power-domains: maxItems: 1+ memory-region:+ maxItems: 1 + description: + Contains the watchdog reserved memory. It is optional. + In the reserved memory, the specified values, which are + PON_REASON_SOF_NUM(0xBBBBCCCC), PON_REASON_MAGIC_NUM(0xDDDDDDDD), + and PON_REASON_EOF_NUM(0xCCCCBBBB), are pre-stored at the first + 3 * 4 bytes to tell that last boot was caused by watchdog reset. + Once the PON reason is captured by driver(rti_wdt.c), the driver + is supposed to wipe the whole memory region. Surely, if this + property is set, at least 12 bytes reserved memory starting from + specific memory address(0xa220000) should be set. More please + refer to Example 2. + required: - compatible - reg @@ -59,3 +73,30 @@ examples: assigned-clocks = <&k3_clks 252 1>; assigned-clock-parents = <&k3_clks 252 5>; }; + + - | + // Example 2 (Add reserved memory for watchdog reset cause): + /* + * RTI WDT in main domain on J721e SoC. Assigned clocks are used to + * select the source clock for the watchdog, forcing it to tick with + * a 32kHz clock in this case. Add a reserved memory to keep the + * watchdog reset cause persistent, which was be written in 12 bytes + * starting from 0xa2200000 by RTI Watchdog Firmware. + * + * Reserved memory should be defined as follows: + * reserved-memory { + * wdt_reset_memory_region: wdt-memory@a2200000 { + * reg = <0x00 0xa2200000 0x00 0x1000>; + * no-map; + * }; + * } + */ + watchdog@40610000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x40610000 0x100>; + clocks = <&k3_clks 135 1>; + power-domains = <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 135 0>; + assigned-clock-parents = <&k3_clks 135 4>; + memory-region = <&wdt_reset_memory_region>; + };
