On 14/07/2023 07:59, Chanho Park wrote: >>> + reg = <0x103f0000 0x100>; >>> + samsung,pwm-outputs = <0>, <1>, <2>, <3>; >>> + #pwm-cells = <3>; >>> + clocks = <&xtcxo>; >> >> This does not look like correct clock. Are you sure XTCXO goes to PWM? > > Yes. XTXCO is the source clock of the pwm. Unlike any other exynos SoCs, the clock is directly derived from the external OSC. > Thus, it cannot be controllable such as gating. Sure, thanks for clarifying. Best regards, Krzysztof
