On 12/07/2023 20:26, Conor Dooley wrote: > Hey, > > On Wed, Jul 12, 2023 at 05:42:13PM +0530, Pankaj Gupta wrote: >> The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded >> secure enclave within the SoC boundary to enable features like >> - HSM >> - SHE >> - V2X >> >> Communicates via message unit with linux kernel. This driver >> is enables communication ensuring well defined message sequence >> protocol between Application Core and enclave's firmware. >> >> Driver configures multiple misc-device on the MU, for multiple >> user-space applications can communicate on single MU. >> >> It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc. >> >> Signed-off-by: Pankaj Gupta <pankaj.gupta@xxxxxxx> >> --- >> .../bindings/arm/freescale/fsl,se-fw.yaml | 121 ++++++++++++++++++ >> 1 file changed, 121 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml >> >> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml >> new file mode 100644 >> index 000000000000..7567da0b4c21 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml >> @@ -0,0 +1,121 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/arm/freescale/fsl,se-fw.yaml# > > I think on v3 you were asked to use a filename that matches the > compatibles? > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: NXP i.MX EdgeLock Enclave Firmware (ELEFW) >> + >> +maintainers: >> + - Pankaj Gupta <pankaj.gupta@xxxxxxx> > >> + value, i.e., supported SoC(s) are imx8ulp, imx93. > >> + >> +properties: >> + compatible: >> + enum: >> + - fsl,imx-ele > > This looks like a generic compatible, not a specific one, but you use it > on the imx8ulp. I would have expected that you would have something like > "fsl,imx8ulp-ele" for that. Yeah, this one looks generic, so not what we expect. > >> + - fsl,imx93-ele > > >> + >> + mboxes: >> + description: >> + A list of phandles of TX MU channels followed by a list of phandles of >> + RX MU channels. The number of expected tx and rx channels is 1 TX, and >> + 1 RX channels. Don't repeat constraints in free form text. This is obvious from the items below. Best regards, Krzysztof
