Audio Clock Mux is the IP for i.MX8QXP, i.MX8QM, and i.MX8XL platform, Add the clockid for them. Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> --- changes in v4: - add Acked-by tag changes in v3: - update subject to "dt-bindings: clock:" changes in v2: - none include/dt-bindings/clock/imx8-clock.h | 28 ++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/include/dt-bindings/clock/imx8-clock.h b/include/dt-bindings/clock/imx8-clock.h index 2e60ce4d2622..2242ff54fc5e 100644 --- a/include/dt-bindings/clock/imx8-clock.h +++ b/include/dt-bindings/clock/imx8-clock.h @@ -164,4 +164,32 @@ #define IMX_ADMA_LPCG_CLK_END 45 +#define IMX_ADMA_ACM_AUD_CLK0_SEL 0 +#define IMX_ADMA_ACM_AUD_CLK1_SEL 1 +#define IMX_ADMA_ACM_MCLKOUT0_SEL 2 +#define IMX_ADMA_ACM_MCLKOUT1_SEL 3 +#define IMX_ADMA_ACM_ESAI0_MCLK_SEL 4 +#define IMX_ADMA_ACM_ESAI1_MCLK_SEL 5 +#define IMX_ADMA_ACM_GPT0_MUX_CLK_SEL 6 +#define IMX_ADMA_ACM_GPT1_MUX_CLK_SEL 7 +#define IMX_ADMA_ACM_GPT2_MUX_CLK_SEL 8 +#define IMX_ADMA_ACM_GPT3_MUX_CLK_SEL 9 +#define IMX_ADMA_ACM_GPT4_MUX_CLK_SEL 10 +#define IMX_ADMA_ACM_GPT5_MUX_CLK_SEL 11 +#define IMX_ADMA_ACM_SAI0_MCLK_SEL 12 +#define IMX_ADMA_ACM_SAI1_MCLK_SEL 13 +#define IMX_ADMA_ACM_SAI2_MCLK_SEL 14 +#define IMX_ADMA_ACM_SAI3_MCLK_SEL 15 +#define IMX_ADMA_ACM_SAI4_MCLK_SEL 16 +#define IMX_ADMA_ACM_SAI5_MCLK_SEL 17 +#define IMX_ADMA_ACM_SAI6_MCLK_SEL 18 +#define IMX_ADMA_ACM_SAI7_MCLK_SEL 19 +#define IMX_ADMA_ACM_SPDIF0_TX_CLK_SEL 20 +#define IMX_ADMA_ACM_SPDIF1_TX_CLK_SEL 21 +#define IMX_ADMA_ACM_MQS_TX_CLK_SEL 22 +#define IMX_ADMA_ACM_ASRC0_MUX_CLK_SEL 23 +#define IMX_ADMA_ACM_ASRC1_MUX_CLK_SEL 24 + +#define IMX_ADMA_ACM_CLK_END 25 + #endif /* __DT_BINDINGS_CLOCK_IMX_H */ -- 2.34.1
