On 05/07/2023 10:17, Mrinmay Sarkar wrote: > Add devicetree YAML binding for Qualcomm QMP PCIe PHY > for SA8775p platform. > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx> > --- > .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > index a0407fc79563..9309066bfcee 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > @@ -23,6 +23,8 @@ properties: > - qcom,sm8350-qmp-gen3x1-pcie-phy > - qcom,sm8550-qmp-gen3x2-pcie-phy > - qcom,sm8550-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x4-pcie-phy > > reg: > minItems: 1 > @@ -30,7 +32,7 @@ properties: > > clocks: > minItems: 5 > - maxItems: 6 > + maxItems: 7 > > clock-names: > minItems: 5 > @@ -39,6 +41,7 @@ properties: > - const: cfg_ahb > - const: ref > - const: rchng > + - const: phy_aux Nope, you didn't test, did you? You cannot just add entries in the middle - you break all the boards. Plus, you clearly missed to update the if:else and all this won't work. Just test the bindings before sending them. > - const: pipe > - const: pipediv2 > > @@ -136,6 +139,20 @@ allOf: > clock-names: > minItems: 6 This is not valid anymore. > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,sa8775p-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x4-pcie-phy > + then: > + properties: > + clocks: > + minItems: 7 > + clock-names: > + maxItems: 7 Keep the same approach for clocks and clock-names. Not min here, max there. > + > - if: > properties: > compatible: Best regards, Krzysztof
