From: Thierry Reding <treding@xxxxxxxxxx>
Convert the Tegra114 SPI controller device tree bindings from plain text
to json-schema format.
Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
---
.../bindings/spi/nvidia,tegra114-spi.txt | 61 -----------
.../bindings/spi/nvidia,tegra114-spi.yaml | 100 ++++++++++++++++++
2 files changed, 100 insertions(+), 61 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
deleted file mode 100644
index db8e0d71c5bc..000000000000
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ /dev/null
@@ -1,61 +0,0 @@
-NVIDIA Tegra114 SPI controller.
-
-Required properties:
-- compatible : For Tegra114, must contain "nvidia,tegra114-spi".
- Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
- <chip> is tegra124, tegra132, or tegra210.
-- reg: Should contain SPI registers location and length.
-- interrupts: Should contain SPI interrupts.
-- clock-names : Must include the following entries:
- - spi
-- resets : Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names : Must include the following entries:
- - spi
-- dmas : Must contain an entry for each entry in clock-names.
- See ../dma/dma.txt for details.
-- dma-names : Must include the following entries:
- - rx
- - tx
-- clocks : Must contain an entry for each entry in clock-names.
- See ../clocks/clock-bindings.txt for details.
-
-Recommended properties:
-- spi-max-frequency: Definition as per
- Documentation/devicetree/bindings/spi/spi-bus.txt
-Optional properties:
-- nvidia,tx-clk-tap-delay: Delays the clock going out to the external device
- with this tap value. This property is used to tune the outgoing data from
- Tegra SPI master with respect to outgoing Tegra SPI master clock.
- Tap values vary based on the platform design trace lengths from Tegra SPI
- to corresponding slave devices. Valid tap values are from 0 thru 63.
-- nvidia,rx-clk-tap-delay: Delays the clock coming in from the external device
- with this tap value. This property is used to adjust the Tegra SPI master
- clock with respect to the data from the SPI slave device.
- Tap values vary based on the platform design trace lengths from Tegra SPI
- to corresponding slave devices. Valid tap values are from 0 thru 63.
-
-Example:
-
-spi@7000d600 {
- compatible = "nvidia,tegra114-spi";
- reg = <0x7000d600 0x200>;
- interrupts = <0 82 0x04>;
- spi-max-frequency = <25000000>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car 44>;
- clock-names = "spi";
- resets = <&tegra_car 44>;
- reset-names = "spi";
- dmas = <&apbdma 16>, <&apbdma 16>;
- dma-names = "rx", "tx";
- <spi-client>@<bus_num> {
- ...
- ...
- nvidia,rx-clk-tap-delay = <0>;
- nvidia,tx-clk-tap-delay = <16>;
- ...
- };
-
-};
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml
new file mode 100644
index 000000000000..58222ffa53d7
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml
@@ -0,0 +1,100 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/nvidia,tegra114-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra114 SPI controller
+
+maintainers:
+ - Thierry Reding <thierry.reding@xxxxxxxxx>
+ - Jon Hunter <jonathanh@xxxxxxxxxx>
+
+properties:
+ compatible:
+ oneOf:
+ - const: nvidia,tegra114-spi
+ - items:
+ - enum:
+ - nvidia,tegra210-spi
+ - nvidia,tegra124-spi
+ - const: nvidia,tegra114-spi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: SPI module clock
+
+ clock-names:
+ items:
+ - const: spi
+
+ resets:
+ items:
+ - description: SPI module reset
+
+ reset-names:
+ items:
+ - const: spi
+
+ dmas:
+ items:
+ - description: DMA channel for the reception FIFO
+ - description: DMA channel for the transmission FIFO
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+ spi-max-frequency:
+ description: Maximum SPI clocking speed of the controller in Hz.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+allOf:
+ - $ref: spi-controller.yaml
+
+unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - dmas
+ - dma-names
+
+examples:
+ - |
+ spi@7000d600 {
+ compatible = "nvidia,tegra114-spi";
+ reg = <0x7000d600 0x200>;
+ interrupts = <0 82 0x04>;
+ clocks = <&tegra_car 44>;
+ clock-names = "spi";
+ resets = <&tegra_car 44>;
+ reset-names = "spi";
+ dmas = <&apbdma 16>, <&apbdma 16>;
+ dma-names = "rx", "tx";
+
+ spi-max-frequency = <25000000>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ nvidia,rx-clk-tap-delay = <0>;
+ nvidia,tx-clk-tap-delay = <16>;
+ };
+ };
--
2.41.0
