On 2023/7/4 17:43, Krzysztof Kozlowski wrote:
> On 04/07/2023 11:04, William Qiu wrote:
>> Add the quad spi controller node for the StarFive JH7110 SoC.
>>
>> Co-developed-by: Ziv Xu <ziv.xu@xxxxxxxxxxxxxxxx>
>> Signed-off-by: Ziv Xu <ziv.xu@xxxxxxxxxxxxxxxx>
>> Signed-off-by: William Qiu <william.qiu@xxxxxxxxxxxxxxxx>
>> Reviewed-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
>
> ...
>
>> + qspi: spi@13010000 {
>> + compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";
>> + reg = <0x0 0x13010000 0x0 0x10000>,
>> + <0x0 0x21000000 0x0 0x400000>;
>> + interrupts = <25>;
>> + clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,
>> + <&syscrg JH7110_SYSCLK_QSPI_AHB>,
>> + <&syscrg JH7110_SYSCLK_QSPI_APB>;
>> + clock-names = "ref", "ahb", "apb";
>> + resets = <&syscrg JH7110_SYSRST_QSPI_APB>,
>> + <&syscrg JH7110_SYSRST_QSPI_AHB>,
>> + <&syscrg JH7110_SYSRST_QSPI_REF>;
>> + reset-names = "qspi", "qspi-ocp", "rstc_ref";
>> + cdns,fifo-depth = <256>;
>> + cdns,fifo-width = <4>;
>> + cdns,trigger-address = <0x0>;
>
> Bus nodes are usually disabled by default and enabled when needed for
> specific boards.
>
Will add status.
Thanks for your comments.
Best regards,
William
> Best regards,
> Krzysztof
>
