On 02/07/2023 19:42, Dmitry Baryshkov wrote: > The L2 cache device on Qualcomm Krait platforms controls the supplying > voltages and the cache frequency. Add corresponding bindings for this > device. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > --- > .../bindings/cache/qcom,krait-l2-cache.yaml | 75 +++++++++++++++++++ > include/dt-bindings/soc/qcom,krait-l2-cache.h | 12 +++ > 2 files changed, 87 insertions(+) > create mode 100644 Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml > create mode 100644 include/dt-bindings/soc/qcom,krait-l2-cache.h > > diff --git a/Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml b/Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml > new file mode 100644 > index 000000000000..1dcf8165135b > --- /dev/null > +++ b/Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml > @@ -0,0 +1,75 @@ > +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/cache/qcom,krait-l2-cache.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Krait L2 Cache > + > +maintainers: > + - Bjorn Andersson <andersson@xxxxxxxxxx> > + > +description: > + L2 cache on Qualcomm Krait platforms is shared between all CPU cores. L2 > + cache frequency and voltages should be scaled according to the needs of the > + cores. > + > +allOf: > + - $ref: ../cache-controller.yaml# This does not look like correct path. git grep also will suggest that... > + > +properties: > + compatible: > + items: > + - const: qcom,krait-l2-cache > + - const: cache > + > + clocks: > + maxItems: 1 > + > + '#interconnect-cells': > + const: 1 > + > + vdd-mem-supply: > + description: suppling regulator for the memory cells of the cache > + > + vdd-dig-supply: > + description: suppling regulator for the digital logic of the cache > + > + operating-points-v2: true > + opp-table-l2: true opp-table: type: object Missing cache-level (const). Best regards, Krzysztof
