Hello Zelong,
Thanks a lot for the patch, please find my comments below.
On Fri, Jun 30, 2023 at 08:10:59PM +0800, zelong dong wrote:
> From: Zelong Dong <zelong.dong@xxxxxxxxxxx>
>
> Add the reset controller device of Meson-C3 SoC family
>
> Signed-off-by: Zelong Dong <zelong.dong@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> index 60ad4f3eef9d..62684b7a684c 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> @@ -6,6 +6,7 @@
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/reset/amlogic,meson-c3-reset.h>
>
> / {
> cpus {
> @@ -82,6 +83,12 @@ uart_b: serial@7a000 {
> clock-names = "xtal", "pclk", "baud";
> };
>
> + reset: reset-controller@0x2000 {
> + compatible = "amlogic,meson-c3-reset";
> + reg = <0x0 0x2000 0x0 0x98>;
> + #reset-cells = <1>;
> + };
> +
As Martin mentioned in the my review, internal apb entries should be
sorted by base reg offset. So reset-controller must be located before
uart_b.
Please refer to:
https://lore.kernel.org/linux-amlogic/CAFBinCAO14zcgY66UyJO9UxuCWf1N-Lsx=iYNTJL=cwXoJv__Q@xxxxxxxxxxxxxx/
> };
> };
> };
> --
> 2.35.1
>
>
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--
Thank you,
Dmitry
