On Fri, Jun 30, 2023 at 12:01:52PM +0200, Julien Stephan wrote: > From: Phi-bang Nguyen <pnguyen@xxxxxxxxxxxx> > > This adds the bindings, for the ISP3.0 camsv module embedded in > some Mediatek SoC, such as the mt8365 > > Signed-off-by: Phi-bang Nguyen <pnguyen@xxxxxxxxxxxx> > Signed-off-by: Julien Stephan <jstephan@xxxxxxxxxxxx> > --- > .../bindings/media/mediatek,mt8365-camsv.yaml | 113 ++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 114 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml > new file mode 100644 > index 000000000000..d81fa5d6db74 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml > @@ -0,0 +1,113 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (c) 2023 MediaTek, BayLibre > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/mediatek,mt8365-camsv.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek CAMSV 3.0 > + > +maintainers: > + - Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> > + - Julien Stephan <jstephan@xxxxxxxxxxxx> > + - Andy Hsieh <andy.hsieh@xxxxxxxxxxxx> > + > +description: > + The CAMSV is a set of DMA engines connected to the SENINF CSI-2 > + receivers. The number of CAMSVs depend on the SoC model. > + > +properties: > + compatible: > + const: mediatek,mt8365-camsv > + > + reg: > + maxItems: 3 > + > + interrupts: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + items: > + - description: cam clock > + - description: camtg clock > + - description: camsv clock > + > + clock-names: > + items: > + - const: camsys_cam_cgpdn > + - const: camsys_camtg_cgpdn > + - const: camsys_camsv > + > + iommus: > + maxItems: 1 > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/properties/port > + unevaluatedProperties: false Drop > + description: connection point for camsv0 > + > + properties: Drop > + endpoint: > + $ref: /schemas/graph.yaml#/$defs/endpoint-base > + unevaluatedProperties: false > + > + required: > + - port@0 > + > +required: > + - compatible > + - interrupts > + - clocks > + - clock-names > + - power-domains > + - iommus > + - ports > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/clock/mediatek,mt8365-clk.h> > + #include <dt-bindings/memory/mediatek,mt8365-larb-port.h> > + #include <dt-bindings/power/mediatek,mt8365-power.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + camsv1: camsv@15050000 { > + compatible = "mediatek,mt8365-camsv"; > + reg = <0 0x15050000 0 0x0040>, > + <0 0x15050208 0 0x0020>, > + <0 0x15050400 0 0x0100>; > + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_LOW>; > + clocks = <&camsys CLK_CAM>, > + <&camsys CLK_CAMTG>, > + <&camsys CLK_CAMSV0>; > + clock-names = "camsys_cam_cgpdn", "camsys_camtg_cgpdn", > + "camsys_camsv"; > + iommus = <&iommu M4U_PORT_CAM_IMGO>; > + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + port@0 { > + reg = <0>; > + camsv1_endpoint: endpoint { > + remote-endpoint = <&seninf_camsv1_endpoint>; > + }; > + }; > + }; > + }; > + }; > +... > diff --git a/MAINTAINERS b/MAINTAINERS > index 9fda342ad331..60b2bceca584 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -13355,6 +13355,7 @@ M: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> > M: Julien Stephan <jstephan@xxxxxxxxxxxx> > M: Andy Hsieh <andy.hsieh@xxxxxxxxxxxx> > S: Supported > +F: Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml > F: Documentation/devicetree/bindings/media/mediatek,mt8365-seninf.yaml > F: drivers/media/platform/mediatek/isp/isp_30/seninf/* > > -- > 2.41.0 >
