Am Freitag, den 05.12.2014, 14:27 +0800 schrieb Andy Yan:
> Signed-off-by: Andy Yan <andy.yan@xxxxxxxxxxxxxx>
This binding is mostly a copy of the existing
Documentation/devicetree/bindings/drm/imx/hdmi.txt, but there is a new
reg-io-width property to configure the register access bus width and we
have added new compatibles "rockchip,rk3288-dw-hdmi" and the common
"snps,dw-hdmi-tx". Could we get an Ack for this and patch 11 by the
device tree maintainers?
regards
Philipp
> ---
>
> Changes in v18:
> - add port bindings
> - correct some spelling mistakes in dw_hdmi bindings doc
>
> Changes in v17: None
> Changes in v16:
> - describe ddc-i2c-bus as optional
> - add common clocks bindings
>
> Changes in v15: None
> Changes in v14: None
> Changes in v13: None
> Changes in v12: None
> Changes in v11: None
> Changes in v10: None
> Changes in v9: None
> Changes in v8:
> - correct some spelling mistake
> - modify ddc-i2c-bus and interrupt description
>
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
>
> .../devicetree/bindings/drm/bridge/dw_hdmi.txt | 50 ++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt
>
> diff --git a/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt b/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt
> new file mode 100644
> index 0000000..a905c14
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt
> @@ -0,0 +1,50 @@
> +DesignWare HDMI bridge bindings
> +
> +Required properties:
> +- compatible: platform specific such as:
> + * "snps,dw-hdmi-tx"
> + * "fsl,imx6q-hdmi"
> + * "fsl,imx6dl-hdmi"
> + * "rockchip,rk3288-dw-hdmi"
> +- reg: Physical base address and length of the controller's registers.
> +- interrupts: The HDMI interrupt number
> +- clocks, clock-names : must have the phandles to the HDMI iahb and isfr clocks,
> + as described in Documentation/devicetree/bindings/clock/clock-bindings.txt,
> + the clocks are soc specific, the clock-names should be "iahb", "isfr"
> +-port@[X]: SoC specific port nodes with endpoint definitions as defined
> + in Documentation/devicetree/bindings/media/video-interfaces.txt,
> + please refer to the SoC specific binding document:
> + * Documentation/devicetree/bindings/drm/imx/hdmi.txt
> + * Documentation/devicetree/bindings/video/dw_hdmi-rockchip.txt
> +
> +Optional properties
> +- reg-io-width: the width of the reg:1,4, default set to 1 if not present
> +- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
> +- clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"
> +
> +Example:
> + hdmi: hdmi@0120000 {
> + compatible = "fsl,imx6q-hdmi";
> + reg = <0x00120000 0x9000>;
> + interrupts = <0 115 0x04>;
> + gpr = <&gpr>;
> + clocks = <&clks 123>, <&clks 124>;
> + clock-names = "iahb", "isfr";
> + ddc-i2c-bus = <&i2c2>;
> +
> + port@0 {
> + reg = <0>;
> +
> + hdmi_mux_0: endpoint {
> + remote-endpoint = <&ipu1_di0_hdmi>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + hdmi_mux_1: endpoint {
> + remote-endpoint = <&ipu1_di1_hdmi>;
> + };
> + };
> + };
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