SM6125 is identical to SM6375 except that while downstream also defines
a throttle clock, its presence results in timeouts whereas SM6375
requires it to not observe any timeouts. This is represented by
reducing the clock array length to 6 so that it cannot be passed. Note
that any SoC other than SM6375 (currently SC7180 and SM6350) are
unconstrained and could either pass or leave out this "throttle" clock.
Signed-off-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
---
.../devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
index 630b11480496..37f66940c5e3 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
@@ -15,6 +15,7 @@ properties:
compatible:
enum:
- qcom,sc7180-dpu
+ - qcom,sm6125-dpu
- qcom,sm6350-dpu
- qcom,sm6375-dpu
@@ -73,6 +74,19 @@ allOf:
clock-names:
minItems: 7
+ - if:
+ properties:
+ compatible:
+ const: qcom,sm6125-dpu
+
+ then:
+ properties:
+ clocks:
+ maxItems: 6
+
+ clock-names:
+ maxItems: 6
+
examples:
- |
#include <dt-bindings/clock/qcom,dispcc-sc7180.h>
--
2.41.0
