On Mon, Jun 26, 2023 at 03:12:15PM +1200, Chris Packham wrote: > Add binding for AC5 SoC. This SoC only supports NAND SDR timings up to > mode 3 so a specific compatible value is needed. > > Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> Cheers, Conor. > --- > > Notes: > Changes in v2: > - Keep compatibles in alphabetical order > - Explain AC5 limitations in commit message > > .../devicetree/bindings/mtd/marvell,nand-controller.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml > index a10729bb1840..1ecea848e8b9 100644 > --- a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml > +++ b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml > @@ -16,6 +16,7 @@ properties: > - const: marvell,armada-8k-nand-controller > - const: marvell,armada370-nand-controller > - enum: > + - marvell,ac5-nand-controller > - marvell,armada370-nand-controller > - marvell,pxa3xx-nand-controller > - description: legacy bindings > -- > 2.41.0 >
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