On Mon, Jun 26, 2023 at 12:19:43PM +0100, Conor Dooley wrote:
> To facilitate adding single letter extensions to riscv_isa_ext, add
> definitions for the extensions present in base_riscv_exts that do not
> already have them.
>
> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> ---
> arch/riscv/include/asm/hwcap.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> index 36f46dfd2b87..a35bee219dd7 100644
> --- a/arch/riscv/include/asm/hwcap.h
> +++ b/arch/riscv/include/asm/hwcap.h
> @@ -14,12 +14,17 @@
> #include <uapi/asm/hwcap.h>
>
> #define RISCV_ISA_EXT_a ('a' - 'a')
> +#define RISCV_ISA_EXT_b ('b' - 'a')
> #define RISCV_ISA_EXT_c ('c' - 'a')
> #define RISCV_ISA_EXT_d ('d' - 'a')
> #define RISCV_ISA_EXT_f ('f' - 'a')
> #define RISCV_ISA_EXT_h ('h' - 'a')
> #define RISCV_ISA_EXT_i ('i' - 'a')
> +#define RISCV_ISA_EXT_j ('j' - 'a')
> +#define RISCV_ISA_EXT_k ('k' - 'a')
> #define RISCV_ISA_EXT_m ('m' - 'a')
> +#define RISCV_ISA_EXT_p ('p' - 'a')
> +#define RISCV_ISA_EXT_q ('q' - 'a')
> #define RISCV_ISA_EXT_s ('s' - 'a')
> #define RISCV_ISA_EXT_u ('u' - 'a')
> #define RISCV_ISA_EXT_v ('v' - 'a')
> --
> 2.40.1
>
Reviewed-by: Andrew Jones <ajones@xxxxxxxxxxxxxxxx>
