From: Haibo Chen <haibo.chen@xxxxxxx>
Enable lpi2c7 bus, and enable i2c IO expander.
Reviewed-by: Clark Wang <xiaoning.wang@xxxxxxx>
Signed-off-by: Haibo Chen <haibo.chen@xxxxxxx>
Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index ab7af705bbca..785108c37210 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -120,6 +120,23 @@ &lpuart5 {
status = "okay";
};
+&lpi2c7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpi2c7>;
+ pinctrl-1 = <&pinctrl_lpi2c7>;
+ status = "okay";
+
+ pcal6408: gpio@21 {
+ compatible = "nxp,pcal9554b";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
&usdhc0 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc0>;
@@ -202,6 +219,13 @@ MX8ULP_PAD_PTF15__LPUART5_RX 0x3
>;
};
+ pinctrl_lpi2c7: lpi2c7grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTE12__LPI2C7_SCL 0x20
+ MX8ULP_PAD_PTE13__LPI2C7_SDA 0x20
+ >;
+ };
+
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
MX8ULP_PAD_PTD1__SDHC0_CMD 0x3
--
2.37.1
