Add WCSSAON reset required for Q6v5 on IPQ8074 SoC. Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx> Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@xxxxxxxxxxx> Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> --- Previous post was here https://lore.kernel.org/linux-arm-msm/20190717200910.1E93C20880@xxxxxxxxxxxxxxx/ drivers/clk/qcom/gcc-ipq8074.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c index 6541d98c0348..910aec33a871 100644 --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c @@ -4685,6 +4685,7 @@ static const struct qcom_reset_map gcc_ipq8074_resets[] = { [GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) }, [GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) }, [GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) }, + [GCC_WCSSAON_RESET] = { 0x59010, 0 }, }; static struct gdsc *gcc_ipq8074_gdscs[] = { -- 2.34.1