In subject, s/Add PCI/Add/ (no need to repeat "PCI") On Wed, Jun 21, 2023 at 10:34:07AM -0700, Lizhi Hou wrote: > The Xilinx Alveo U50 PCI card exposes multiple hardware peripherals on > its PCI BAR. The card firmware provides a flattened device tree to > describe the hardware peripherals on its BARs. This allows U50 driver to > load the flattened device tree and generate the device tree node for > hardware peripherals underneath. > > To generate device tree node for U50 card, added PCI quirks to call > of_pci_make_dev_node() for U50. s/added/add/ (tell me what the patch does, not what you did) > Signed-off-by: Lizhi Hou <lizhi.hou@xxxxxxx> Acked-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> > --- > drivers/pci/quirks.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index c525867760bf..c8f3acea752d 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -6041,3 +6041,14 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2d, dpc_log_size); > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2f, dpc_log_size); > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a31, dpc_log_size); > #endif > + > +/* > + * For PCI device which have multiple downstream devices, its driver may use > + * a flattened device tree to describe the downstream devices. > + * To overlay the flattened device tree, the PCI device and all its ancestor > + * devices need to have device tree nodes on system base device tree. Thus, > + * before driver probing, it might need to add a device tree node as the final s/For PCI device which have multiple/For a PCI device with multiple/ It looks like you intend two separate paragraphs in the comment. If so, add a blank line between them. If not, rewrap so they're a single paragraph. > + * fixup. > + */ > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5020, of_pci_make_dev_node); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5021, of_pci_make_dev_node); > -- > 2.34.1 >
