Setting the status register write disable (SRWD) bit in the status
register (SR) with WP signal of the flash not connected will configure the
SR permanently as read-only. To avoid this a boolean type DT property
"broken-wp" is introduced. If this property is defined, the spi-nor doesn't
set the SRWD bit in SR while performing flash protection operation.
---
BRANCH: for-next
Changes in v2:
- Modified DT property description to add information about a
valid use case.
- Added Reviewed-by tag in 1/2.
- Updated comment description in 2/2.
---
Amit Kumar Mahapatra (2):
dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid setting
SRWD bit in status register
mtd: spi-nor: Avoid setting SRWD bit in SR if WP signal not connected
.../devicetree/bindings/mtd/jedec,spi-nor.yaml | 15 +++++++++++++++
drivers/mtd/spi-nor/core.c | 3 +++
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/swp.c | 9 +++++++--
4 files changed, 26 insertions(+), 2 deletions(-)
--
2.17.1
