On Tue, Dec 02, 2014 at 03:35:47PM +0530, Harini Katakam wrote: > From: Vishnu Motghare <vishnum@xxxxxxxxxx> > > Cadence I2C controller has bug wherein it generates invalid read transactions > after time-out in master receiver mode. This driver does not use the HW > timeout and this interrupt is disabled but the feature itself cannot be > disabled. Hence, this patch writes the maximum value (0xFF) to this register. > This is one of the workarounds to this bug and it will not avoid the issue > completely but reduce the chances of error. This is a good description and should be in a comment in the driver. > > Signed-off-by: Vishnu Motghare <vishnum@xxxxxxxxxx> > Signed-off-by: Harini Katakam <harinik@xxxxxxxxxx> > --- > drivers/i2c/busses/i2c-cadence.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c > index e54899e..8065205 100644 > --- a/drivers/i2c/busses/i2c-cadence.c > +++ b/drivers/i2c/busses/i2c-cadence.c > @@ -111,6 +111,8 @@ > #define CDNS_I2C_DIVA_MAX 4 > #define CDNS_I2C_DIVB_MAX 64 > > +#define CDNS_I2C_TIMEOUT_MAX 0xFF > + > #define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset) > #define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset) > > @@ -858,6 +860,8 @@ static int cdns_i2c_probe(struct platform_device *pdev) > goto err_clk_dis; > } > > + cdns_i2c_writereg(CDNS_I2C_TIMEOUT_MAX, CDNS_I2C_TIME_OUT_OFFSET); > + > dev_info(&pdev->dev, "%u kHz mmio %08lx irq %d\n", > id->i2c_clk / 1000, (unsigned long)r_mem->start, id->irq); > > -- > 1.7.9.5 >
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