On Tue, Jun 13, 2023 at 09:13:47PM +0200, Konrad Dybcio wrote:
> The lowest nibble of the PSCI suspend param denotes the CPU state.
> It was mistakenly set to mimic the cluster state, resulting in poking
> PSCI with undocumented 0x2 and 0x4 states (both of which seem to be
> implemented and undocumented). Also, GDHS cluster param was wrong for C1.
>
> Fix that.
>
> Fixes: b5de1a9ff1f2 ("arm64: dts: qcom: sm6115: Add CPU idle-states")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 55118577bf92..07d8b842d7be 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -225,7 +225,7 @@ domain-idle-states {
> CLUSTER_0_SLEEP_0: cluster-sleep-0-0 {
> /* GDHS */
> compatible = "domain-idle-state";
> - arm,psci-suspend-param = <0x40000022>;
> + arm,psci-suspend-param = <0x40000023>;
I think entering GDHS is also "Core is last in power level" "1=Cluster"
so (1 << 24) should be set here as well (i.e. 0x41...).
Otherwise the fixes look good, thanks for taking a look!
Thanks,
Stephan
