On 12/06/2023 13.30, Rasmus Villemoes wrote:
> diff --git a/drivers/rtc/rtc-isl12022.c b/drivers/rtc/rtc-isl12022.c
> index 1b6659a9b33a..690dbb446d1a 100644
> --- a/drivers/rtc/rtc-isl12022.c
> +++ b/drivers/rtc/rtc-isl12022.c
> @@ -280,8 +280,25 @@ static void isl12022_set_trip_levels(struct device *dev)
> mask = ISL12022_REG_VB85_MASK | ISL12022_REG_VB75_MASK;
>
> ret = regmap_update_bits(regmap, ISL12022_REG_PWR_VBAT, mask, val);
> - if (ret)
> + if (ret) {
> dev_warn(dev, "unable to set battery alarm levels: %d\n", ret);
> + return;
> + }
> +
> + ret = regmap_write_bits(regmap, ISL12022_REG_BETA,
> + ISL12022_BETA_TSE, ISL12022_BETA_TSE);
> + if (ret) {
> + dev_warn(dev, "unable to trigger battery level detection: %d\n", ret);
> + return;
> + }
> +
> + ret = isl12022_read_sr(regmap);
So testing this a bit more thoroughly reveals that the LBAT85/LBAT75
bits do not get updated immediately after the TSE bit is set; one needs
to wait a little before the battery voltage detection is done and the SR
bits updated. Unfortunately, the data sheet doesn't say anything about
how long that might be or if there's some busy bit one could look at;
all it says is actually exactly what I've done above:
The battery level monitor is not functional in battery backup
mode. In order to read the monitor bits after powering up VDD,
instigate a battery level measurement by setting the TSE bit to
"1" (BETA register), and then read the bits.
IOW, please don't apply this patch until I figure out how to do this
properly.
Rasmus
