On 12/06/2023 13:04, Borislav Petkov wrote: > On Wed, Jan 11, 2023 at 05:32:43PM +0800, Marvin Lin wrote: >> Add node for memory controller present on Nuvoton NPCM SoCs. The >> memory controller supports single bit error correction and double bit >> error detection. >> >> Signed-off-by: Marvin Lin <milkfafa@xxxxxxxxx> >> --- >> arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++ >> 1 file changed, 7 insertions(+) > > I guess this needs an Ack from OF folks if it is going to go through the > EDAC tree ... It is preferred this goes via Nuvoton ARM SoC tree. I don't understand why this is first in the series - it's clearly wrong. Best regards, Krzysztof
