On 12/06/2023 10:18, Krzysztof Kozlowski wrote: > On 08/06/2023 18:22, Sebastian Reichel wrote: >> Add PHY transmit and receive clocks as described by the >> DW SATA AHCI HW manual. >> >> Suggested-by: Serge Semin <fancer.lancer@xxxxxxxxx> >> Signed-off-by: Sebastian Reichel <sebastian.reichel@xxxxxxxxxxxxx> >> --- >> .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml >> index c1457910520b..34c5bf65b02d 100644 >> --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml >> +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml >> @@ -31,11 +31,11 @@ properties: >> PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) >> clock, etc. >> minItems: 1 >> - maxItems: 4 >> + maxItems: 6 >> >> clock-names: >> minItems: 1 >> - maxItems: 4 >> + maxItems: 6 >> items: >> oneOf: >> - description: Application APB/AHB/AXI BIU clock >> @@ -48,6 +48,10 @@ properties: >> const: pmalive >> - description: RxOOB detection clock >> const: rxoob >> + - description: PHY Transmit Clock >> + const: asic >> + - description: PHY Receive Clock >> + const: rbc > > Conor's comment was not resolved. Adding entries in the middle breaks > existing users and commit msg does not explain this. Wait, this is oneOf, not a list. Damn context. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
